Q&A Embedded Processors: Electronics Engineering

Q&A Embedded Processors. This set includes 10 Multiple Choice Q&A on Embedded Processors in Electronics Engineering.


Q&A Embedded Processors


Which kind of low-order 16 bits control register is also regarded as ‘Machine Status Word’ (MSW) in order to make it compatible with i286 ??

a. CR0
b. CR1
c. CR2
d. CR3


In the test registers, what do/does the linear address bit hold/s with respect to TLB (Translation Look-aside Buffers) ??

a. Physical address
b. Selection between write and lookup of TLB
c. Tag field
d. All of the above


For addressing in real mode, which segment plays a significant role in the storage of destination operands during the string operation ??

a. Code Segment
b. Data Segment
c. Stack Segment
d. Extra Segment


In x86 architecture, which type of gate acts as an intermediary between code segments at different privilege levels (PLs) ??

a. Call gates
b. Task gates
c. Interrupt gates
d. Trap gates


In the Pentium processor, which write buffer is used by the pipeline ALUs in order to write the result to the memory ??

a. External Snoop Write Buffer
b. Internal Snoop Write Buffer
c. Line Replacement Write Buffer
d. Write-back Buffer


Q&A Embedded Processors


Which stage associated with pipelining mechanism recognizes the instruction that is to be executed ??

a. Fetch
b. Decode
c. Execute
d. None of the above


Which kind of addressing mode for memory access operands support pre-index and post-index in addition to the generation of a memory address by an immediate value added to a register ??

a. Register indirect addressing mode
b. Relative register indirect addressing mode
c. Base indexed indirect addressing mode
d. Base with scale register addressing mode


Which mnemonic implies ‘plus’ meaning in the branch instructions ??

a. BPL
b. BEQ
c. BMI
d. BAL


In the branch instructions of ARM, what does the mnemonic BVC imply ??

a. Overflow Set
b. Carry Set
c. Carry Clear
d. Overflow Clear


Which type of branching instructions of thumb possesses an 11-bit address & is generally applicable for slightly longer jumps in order to implement the instructions like GOTO of high-level languages ??

a. Short Conditional Branch
b. Medium-Range Unconditional Branch
c. Long Range Subroutine Calls
d. None of the above


More Posts

Leave a Comment

error: Content is protected !!