Microcontroller Viva Questions: Electronics Engineering

Microcontroller Viva Questions. 25 Multiple Choice Questions related to Viva and tests on the topic Microcontrollers in Electronics Engineering. For all related MCQs visit Microcontrollers And Its Applications

 

Microcontroller Viva Questions

 

 

What is the rate of power-up delay provided by an oscillator start-up timer while operating at XT, LP, and HS oscillator modes ??

a. 512 cycles
b. 1024 cycles
c. 2048 cycles
d. 4096 cycles

 

Generation of Power-on-reset pulse can occur only after ??

a. the detection of increment in VDD from 1.5 V to 2.1 V
b. the detection of decrement in VDD from 2.1 V to 1.5 V
c. the detection of variable time delay on power-up mode
d. the detection of a current limiting factor

 

Which condition/s of MCLR (master clear) pin allows resetting the PIC ??

a. High
b. Low
c. Moderate
d. All of the above

 

Where do the contents of PCLATH get transferred in the higher location of the program counter while writing in PCL (Program Counter Latch) ??

a. 11th bit
b. 12th bit
c. 13th bit
d. 14th bit

 

Which among the below stated registers specify the address reachability within 7 bits of address independent of RP0 status bit register ??

a. PCL
b. FSR
c. INTCON
d. All of the above

 

Microcontroller Viva Questions

 

Which statement is precise in relation to FSR, INDF, and indirect addressing mode ??

a. Address byte must be written in FSR before executing INDF instruction in the indirect addressing mode
b. Address byte must be written in FSR after executing INDF instruction in the indirect addressing mode
c. Address byte must be written in FSR at the same time during the execution of INDF instruction in the indirect addressing mode
d. Address byte must be always written in FSR as it is independent of any instruction in the indirect addressing mode

a. Only A
b. Only B
c. Only A & B
d. A & D

 

Which status bits exhibit carry from lower 4 bits during 8-bit addition and are especially beneficial for BCD addition ??

a. Carry bit (C)
b. Digits Carry bit (DC)
c. Both a & b
d. None of the above

 

The RPO status register bit has the potential to determine the effective address of ??

a. Direct Addressing Mode
b. Indirect Addressing Mode
c. Immediate Addressing Mode
d. Indc. Watchdog Timer (WDT) exed Addressing Mode

 

Which among the below-mentioned bits specify the reset status of register in a readable format and are usually utilized in sleep mode of PIC ??

a. TO
b. PD
c. Both a & b
d. None of the above

 

How many RPO status bits are required for the selection of two register banks ??

a. 1
b. 2
c. 8
d. 16

 

Microcontroller Viva Questions

 

Which register/s is/are mandatory to get loaded at the beginning before loading or transferring the contents to corresponding destination registers ??

a. W
b. INDF
c. PCL
d. All of the above

 

Which among the CPU registers of PIC 16C6X/7X is not 8-bit wide ??

a. Status Register
b. Program Counter Latch (PCLATH) Register
c. Program Counter Low Byte (PCL) Register
d. File Selection Register (FSR)

 

Which timer/s possess an ability to prevent an endless loop hanging condition of PIC along with its own on-chip RC oscillator by contributing to its reliable operation ??

a. Power-Up Timer (PWRT)
b. Oscillator Start-Up Timer (OST)
c. Watchdog Timer (WDT)
d. All of the above

 

Which among the below specified major functionalities is/are associated with the programmable timers of PIC ??

a. Excogitation of Inputs
b. Handling of Outputs
c. Interpretation of internal timing for program execution
d. Provision of OTP for large and small production runs

a. Only C
b. C & D
c. A, B & D
d. A, B & C

 

Which among the below stated reasons is/are responsible for the selection of PIC implementation/design on the basis of Harvard architecture instead of Von-Newman architecture ??

a. Improvement in bandwidth
b. Instruction fetching becomes possible over a single instruction cycle
c. Independent bus access provision to data memory even while accessing the program memory
d. All of the above

 

Microcontroller Viva Questions

 

Which operational feature of PIC allows it to reset especially when the power supply drops the voltage below 4V ??

a. Built-in Power-on-reset
b. Brown-out reset
c. Both a & b
d. None of the above

 

What is the execution speed of instructions in PIC especially while operating at the maximum value of clock rate ??

a. 0.1 μs
b. 0.2 μs
c. 0.4 μs
d. 0.8 μs

 

Which flags are more likely to get affected in status registers by Arithmetic and Logical Unit (ALU) of PIC 16 CXX on the basis of instructions execution ??

a. Carry (C) Flags
b. Zero (Z) Flags
c. Digit Carry (DC) Flags
d. All of the above

 

How many clock pulses are confined by each machine cycle of Peripheral-Interface Controllers ??

a. 4
b. 8
c. 12
d. 16

 

What does the RAM location at 44H indicates about the seven-segment code ??

a. 7-segment code for the third character
b. 7-segment code for the fourth character
c. Display of select code for third display
d. Display of select code for fourth display

 

Microcontroller Viva Questions

 

How are the port pins of the microcontroller calculated for time-multiplexing types of display ??

a. 4 + number of digits to be displayed
b. 4 raised to the number of digits to be displayed
c. 4 – number of digits to be displayed
d. 4 x number of digits to be displayed

 

What is the purpose of blanking (BI) associated with the 7-segment display operations ??

a. To turn ON the display
b. To turn OFF the display
c. To pulse modulate the brightness of display
d. To pulse modulate the lightness of display

a. B & C
b. A & D
c. A & B
d. C & D

 

Which errors are more likely to get generated by conversion time and ADC resolution respectively in accordance to the digital signal processing ??

a. Sampling & Quantization Errors
b. Systematic & Random Errors
c. Overload & Underload Errors
d. None of the above

 

Which pin/signal of ADC AD571 interfacing apprises the accomplishment of data reading in the microcontroller so as to indicate ADC to get ready for the next data sample ??

a. BLANK /CONVERT (high)
b. BLANK/DR (low)
c. DATA READY (DR)
d. All of the above

 

Which factors indicate the necessity of sample and hold circuits in the process of analog-to-digital conversion ??

a. Instantaneous variation in an input signal
b. Analog-to-digital conversion time
c. Both a & b
d. None of the above

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